38 search results - page 1 / 8 » Analysis and approximation of optimal co-scheduling on chip ... |
IEEEPACT
2008
IEEE
13 years 11 months ago
2008
IEEE
RTSS
2007
IEEE
13 years 11 months ago
2007
IEEE
In multiprocessor systems, the traffic on the bus does not solely originate from data transfers due to data dependencies between tasks, but is also affected by memory transfers a...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
IEEEPACT
2009
IEEE
13 years 12 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...