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» Analytical approach to layout generation of datapath cells
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TCAD
2002
129views more  TCAD 2002»
13 years 4 months ago
Analytical approach to layout generation of datapath cells
Maciej J. Ciesielski, Serkan Askar, Samuel Levitin
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
13 years 10 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
DAC
1998
ACM
14 years 5 months ago
Practical Experiences with Standard-Cell Based Datapath Design Tools: Do We Really Need Regular Layouts?
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...
Alexander Grießing, Paolo Ienne
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
13 years 11 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
ICCAD
2002
IEEE
89views Hardware» more  ICCAD 2002»
13 years 10 months ago
Free space management for cut-based placement
IP blocks and large macro cells are increasingly prevalent in physical design, actually causing an increase in the available free space for the dust logic. We observe that top-dow...
Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia