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» Approximate logic synthesis for error tolerant applications
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IISWC
2006
IEEE
13 years 11 months ago
Characterization of Error-Tolerant Applications when Protecting Control Data
Soft errors have become a significant concern and recent studies have measured the “architectural vulnerability factor” of systems to such errors, or conversely, the potentia...
Darshan D. Thaker, Diana Franklin, John Oliver, Su...
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 11 months ago
Energy Bounds for Fault-Tolerant Nanoscale Designs
- The problem of determining lower bounds for the energy cost of a given nanoscale design is addressed via a complexity theory-based approach. This paper provides a theoretical fra...
Diana Marculescu
ISCAS
2006
IEEE
148views Hardware» more  ISCAS 2006»
13 years 11 months ago
DF-DICE: a scalable solution for soft error tolerant circuit design
—The Delay Filtered Dual Interlocked storage Cell (DF-DICE) offers a scalable solution in different radiation environments for soft error mitigation. The area and speed performan...
Riaz Naseer, Jeff Draper
ADL
1997
Springer
125views Digital Library» more  ADL 1997»
13 years 9 months ago
Error Tolerant Document Structure Analysis
Successful applications of digital libraries require structured access to sources of information. This paper presents an approach to extract the logical structure of text document...
Bertin Klein, Peter Fankhauser
DAC
2010
ACM
13 years 9 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich