31 search results - page 3 / 7 » Approximation Approach for Timing Jitter Characterization in... |
INFOCOM
2000
IEEE
13 years 10 months ago
2000
IEEE
—In a reconfigurable network, lightpath connections can be dynamically changed to reflect changes in traffic conditions. This paper characterizes the gain in traffic capacity tha...
DATE
2007
IEEE
14 years 4 days ago
2007
IEEE
— System-on-Chip designs often have a large number of timing domains. Communication between these domains requires synchronization, and the failure probabilities of these synchro...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
DATE
2006
IEEE
13 years 12 months ago
2006
IEEE
— In this paper, we present an analysis methodology to compute circuit node sensitivity due to charged particle induced delay (timing) errors, Soft Delay Errors (SDE). We define...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...