60 search results - page 1 / 12 » Architectural Frameworks for MPP Systems on a Chip |
IPPS
2003
IEEE
13 years 10 months ago
2003
IEEE
Advances in fabrication techniques are now enabling new hybrid CPU/FPGA computing resources to be integrated onto a single chip. While these new hybrids promise significant perfor...
CF
2007
ACM
13 years 8 months ago
2007
ACM
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
JSA
2010
12 years 11 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
DELTA
2008
IEEE
13 years 6 months ago
2008
IEEE
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...