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VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
14 years 6 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
IEEEPACT
2008
IEEE
14 years 17 days ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
DELTA
2006
IEEE
13 years 9 months ago
Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder
The efficiency of the Public Key encryption systems like RSA and ECC can be improved with the adoption of a faster multiplication scheme. In this paper, Modified Montgomery multip...
Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Redd...
TPDS
2008
196views more  TPDS 2008»
13 years 6 months ago
End-to-End Energy Management in Networked Real-Time Embedded Systems
Recent technological advances have opened up a wide range of distributed real-time applications involving battery-driven embedded devices with local processing and wireless communi...
G. Sudha Anil Kumar, Govindarasu Manimaran, Zhengd...
HIPC
1999
Springer
13 years 10 months ago
Microcaches
We describe a radically new cache architecture and demonstrate that it offers a huge reduction in cache cost, size and power consumption whilst maintaining performance on a wide ra...
David May, Dan Page, James Irwin, Henk L. Muller