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» Architectural support for shadow memory in multiprocessors
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HPCA
2007
IEEE
14 years 3 days ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
SIGGRAPH
1998
ACM
13 years 10 months ago
The Clipmap: A Virtual Mipmap
We describe the clipmap, a dynamic texture representation that efficiently caches textures of arbitrarily large size in a finite amount of physical memory for rendering at real-...
Christopher C. Tanner, Christopher J. Migdal, Mich...
WSC
1997
13 years 7 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
SC
2000
ACM
13 years 10 months ago
Is Data Distribution Necessary in OpenMP?
This paper investigates the performance implications of data placement in OpenMP programs running on modern ccNUMA multiprocessors. Data locality and minimization of the rate of r...
Dimitrios S. Nikolopoulos, Theodore S. Papatheodor...
SPAA
2004
ACM
13 years 11 months ago
DCAS is not a silver bullet for nonblocking algorithm design
Despite years of research, the design of efficient nonblocking algorithms remains difficult. A key reason is that current shared-memory multiprocessor architectures support only s...
Simon Doherty, David Detlefs, Lindsay Groves, Chri...