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IEICET
2007
64views more  IEICET 2007»
13 years 5 months ago
Architectural-Level Soft-Error Modeling for Estimating Reliability of Computer Systems
Makoto Sugihara, Tohru Ishihara, Kazuaki Murakami
DSN
2005
IEEE
13 years 7 months ago
SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors
Soft errors are a growing concern for processor reliability. Recent work has motivated architecture-level studies of soft errors since the architecture can mask many raw errors an...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ISQED
2006
IEEE
123views Hardware» more  ISQED 2006»
13 years 11 months ago
A Simulation-Based Soft Error Estimation Methodology for Computer Systems
This paper proposes a simulation-based soft error estimation methodology for computer systems. Accumulating soft error rates (SERs) of all memories in a computer system results in...
Makoto Sugihara, Tohru Ishihara, Masanori Muroyama...
DSN
2007
IEEE
13 years 11 months ago
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions
This paper concerns the validity of a widely used method for estimating the architecture-level mean time to failure (MTTF) due to soft errors. The method first calculates the fai...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 2 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori