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IEEEPACT
2008
IEEE
13 years 11 months ago
The PARSEC benchmark suite: characterization and architectural implications
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
Christian Bienia, Sanjeev Kumar, Jaswinder Pal Sin...
IISWC
2006
IEEE
13 years 11 months ago
Comparing Benchmarks Using Key Microarchitecture-Independent Characteristics
— Understanding the behavior of emerging workloads is important for designing next generation microprocessors. For addressing this issue, computer architects and performance anal...
Kenneth Hoste, Lieven Eeckhout
SC
2009
ACM
14 years 2 days ago
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
Subhash Saini, Andrey Naraikin, Rupak Biswas, Davi...
SIGMETRICS
2010
ACM
145views Hardware» more  SIGMETRICS 2010»
13 years 23 hour ago
Towards architecture independent metrics for multicore performance analysis
The prevalence of multicore architectures has made the performance analysis of multithreaded applications an intriguing area of inquiry. An understanding of locality effects and c...
Milind Kulkarni, Vijay S. Pai, Derek L. Schuff
ISPASS
2008
IEEE
13 years 11 months ago
Investigating the TLB Behavior of High-end Scientific Applications on Commodity Microprocessors
The floating point portion of the SPEC CPU suite and the HPC Challenge suite are widely recognized and utilized as benchmarks that represent scientific application behavior. In th...
Collin McCurdy, Alan L. Cox, Jeffrey S. Vetter