681 search results - page 1 / 137 » Architecture and Implementation of PIM m |
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
CLUSTER
2003
IEEE
13 years 11 months ago
2003
IEEE
Memory may be the only system component that is more commoditized than a microprocessor. To simultaneously exploit this and address the impending memory wall, processing in memory...
WMPI
2004
ACM
13 years 11 months ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
ISCA
2003
IEEE
13 years 11 months ago
2003
IEEE
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
RECONFIG
2008
IEEE
14 years 8 hour ago
2008
IEEE
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...