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» Architecture and compilation for data bandwidth improvement ...
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IH
2005
Springer
13 years 10 months ago
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance
Abstract. Information hiding has been studied in many security applications such as authentication, copyright management and digital forensics. In this work, we introduce a new app...
Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan K...
CODES
2004
IEEE
13 years 8 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
CASES
2007
ACM
13 years 6 months ago
Facilitating compiler optimizations through the dynamic mapping of alternate register structures
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
Chris Zimmer, Stephen Roderick Hines, Prasad Kulka...
CODES
2001
IEEE
13 years 8 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
HPCA
1997
IEEE
13 years 9 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross