24 search results - page 3 / 5 » Architecture and compilation for data bandwidth improvement ... |
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
ISCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
CASES
2001
ACM
13 years 9 months ago
2001
ACM
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...
MICRO
1998
IEEE
13 years 9 months ago
1998
IEEE
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...