72 search results - page 15 / 15 » Architecture evaluation for power-efficient FPGAs |
FPGA
2004
ACM
13 years 10 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
FPGA
2010
ACM
13 years 5 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...