5 search results - page 1 / 1 » Architecture of a VLSI cellular processor array for synchron... |
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
ARVLSI
1999
IEEE
13 years 8 months ago
1999
IEEE
Application-specific processor design is a promising approach for meeting the performance and cost goals of a system. Application-specific processors are especially promising for ...
TVLSI
1998
13 years 4 months ago
1998
—A practical system approach for time-multiplexing cellular neural network (CNN) implementations suitable for processing large and complex images using small CNN arrays is presen...
ARVLSI
1997
IEEE
13 years 8 months ago
1997
IEEE
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...