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ISQED
2009
IEEE
112views Hardware» more  ISQED 2009»
14 years 4 days ago
Estimation and optimization of reliability of noisy digital circuits
— With continued scaling, reliability is emerging as a critical challenge for the designers of digital circuits. The challenge stems in part from the lack of computationally ef...
Satish Sivaswamy, Kia Bazargan, Marc D. Riedel
ICCAD
2005
IEEE
133views Hardware» more  ICCAD 2005»
14 years 2 months ago
Gate sizing using incremental parameterized statistical timing analysis
— As technology scales into the sub-90nm domain, manufacturing variations become an increasingly significant portion of circuit delay. As a result, delays must be modeled as sta...
Matthew R. Guthaus, Natesan Venkateswaran, Chandu ...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 9 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
ICCAD
1997
IEEE
112views Hardware» more  ICCAD 1997»
13 years 9 months ago
Circuit optimization via adjoint Lagrangians
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...

Lecture Notes
1962views
15 years 5 months ago
Lectures on VLSI and Integrated Circuit Design
VLSI (Very Large Scale Integration) CMOS (Complementary Metal Oxide Semiconductor) technology is the main driver of our digital revolution. The goals of these lecture are to learn ...
Sherief Reda