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ISQED
2009
IEEE

Estimation and optimization of reliability of noisy digital circuits

10 years 11 months ago
Estimation and optimization of reliability of noisy digital circuits
— With continued scaling, reliability is emerging as a critical challenge for the designers of digital circuits. The challenge stems in part from the lack of computationally efficient techniques for analyzing and optimizing circuits for reliability. To address this problem, we propose an exact analysis method based on circuit transformations. Also, we propose a hybrid method that combines exact analysis with probabilistic measures to estimate reliability. We use such measures in a rewiring-based optimization framework to optimize reliability. Our hybrid approach offers a speedup of 56X when compared to a pure Monte Carlo simulation-based approach with only a 3.5% loss in accuracy. Our optimization framework improves reliability by about 10% accompanied by a 6.9% reduction in circuit area1 . Keywords— Reliability, Testing, and Fault-Tolerance, Optimization, Automatic Synthesis
Satish Sivaswamy, Kia Bazargan, Marc D. Riedel
Added 19 May 2010
Updated 19 May 2010
Type Conference
Year 2009
Where ISQED
Authors Satish Sivaswamy, Kia Bazargan, Marc D. Riedel
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