22 search results - page 3 / 5 » Area Optimizations for Dual-Rail Circuits Using Relative-Tim... |
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
Partial Scan techniques have been widely accepted as an effective solution to improve sequential ATPG performance while keeping acceptable area and performance overheads. Several ...
ISPD
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
ISPD
2005
ACM
13 years 11 months ago
2005
ACM
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...