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» Area-time optimal adder with relative placement generator
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ISCAS
2003
IEEE
119views Hardware» more  ISCAS 2003»
13 years 10 months ago
Area-time optimal adder with relative placement generator
Aamir A. Farooqui, Vojin G. Oklobdzija, Sadiq M. S...
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
13 years 9 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn
ISPD
1997
ACM
105views Hardware» more  ISPD 1997»
13 years 9 months ago
Regular layout generation of logically optimized datapaths
The inherent distortion of the structural regularity of VLSI datapaths after logic optimization has until now precluded dense regular layouts of optimized datapaths despite their ...
R. X. T. Nijssen, C. A. J. van Eijk
VR
2000
IEEE
174views Virtual Reality» more  VR 2000»
13 years 9 months ago
Optimization-Based Virtual Surface Contact Manipulation at Force Control Rates
Previous interactive works have used springs, heuristics, and dynamics for surface placement applications. We present an analytical technique for kilohertz rate manipulation of CA...
Donald D. Nelson, Elaine Cohen
GECCO
2004
Springer
125views Optimization» more  GECCO 2004»
13 years 10 months ago
An Island-Based GA Implementation for VLSI Standard-Cell Placement
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
Guangfa Lu, Shawki Areibi