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    APCSAC
    2003
    IEEE
    164views Computer Architecture» more  APCSAC 2003»
    Arithmetic Circuits Combining Residue and Signed-Digit Representations
    13 years 10 months ago
    Arithmetic Circuits Combining Residue and Signed-Digit Representations
    Download  www.digitalfanatics.org
    This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adde...
    Anders Lindström, Michael Nordseth, Lars Beng...
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    GLVLSI
    1999
    IEEE
    133views VLSI» more  GLVLSI 1999»
    Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation
    13 years 9 months ago
    Residue Arithmetic Circuits Based on Signed-Digit Number Representation and the VHDL Implementation
    Download  www.cs.york.ac.uk
    Shugang Wei, Kensuke Shimizu
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    TC
    1998
    177views Information Technology» more  TC 1998»
    Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
    13 years 4 months ago
    Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
    Download  www.eecs.umich.edu
    —This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
    Alejandro F. González, Pinaki Mazumder
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    TC
    1998
    118views Information Technology» more  TC 1998»
    A New Representation of Elements of Finite Fields GF(2m) Yielding Small Complexity Arithmetic Circuits
    13 years 4 months ago
    A New Representation of Elements of Finite Fields GF(2m) Yielding Small Complexity Arithmetic Circuits
    Download  eref.uqu.edu.sa
    —Let F2 denote the binary field and F 2 m an algebraic extension of degree m > 1 over F2 . Traditionally, elements of F 2 m are either represented as powers of a primitive ele...
    Germain Drolet
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    PDPTA
    2003
    171views Distributed And Parallel Com...» more  PDPTA 2003»
    Quaternary Arithmetic Logic Unit on a Programmable Logic Device
    13 years 6 months ago
    Quaternary Arithmetic Logic Unit on a Programmable Logic Device
    Download  kricks.eng.ua.edu
    Common binary arithmetic operations such as addition/subtraction and multiplication suffer from O(n) carry propagation delay where n is the number of digits. Carry lookahead helps...
    Songpol Ongwattanakul, Phaisit Chewputtanagul, Dav...
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