8 search results - page 1 / 2 » Arithmetic built-in self test for high-level synthesis |
DFT
1993
IEEE
13 years 9 months ago
1993
IEEE
VTS
1995
IEEE
13 years 8 months ago
1995
IEEE
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
There have been several recent attempts to include duplication-based on-line testability in behaviourally synthesized designs. In this paper, on-line testability is considered wit...
DATE
1997
IEEE
13 years 9 months ago
1997
IEEE
Many Built-In Self Test pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs o...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...