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2004
IEEE

Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique

11 years 4 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description to make more testable. Although it can be argued that good results have been obtained with such approaches, we must keep in mind that with the emergence of commercial behavioural synthesis tools it is difficult for the designer to understand an automatically generated structural RTL description. With the ever increasing complexity and pressure to shorten time to market, test synthesis must not be dissociated from design synthesis. This paper shows that it is possible to generate optimised self-testable RTL when adat the highest level of abstraction ie., behavioural description. This is achieved by developing a novel and accurate Built-In Self-Test (BIST) resource estimation technique based on exploitation of certain characteristics of the controller of the design.
M. S. Gaur, Mark Zwolinski
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2004
Where VLSID
Authors M. S. Gaur, Mark Zwolinski
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