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» Automated Logical Verification Based on Trace Abstractions
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PODC
1996
ACM
14 years 2 months ago
Automated Logical Verification Based on Trace Abstractions
95-53Klarlundetal.:AutomatedLogicalVerificationbasedonTraceAbstractions BRICSBasic Research in Computer Science Automated Logical Verification Trace Abstractions Nils Klarlund Moge...
Nils Klarlund, Mogens Nielsen, Kim Sunesen
DAC
2006
ACM
14 years 11 months ago
Guiding simulation with increasingly refined abstract traces
Traces Kuntal Nanshi, Fabio Somenzi University of Colorado at Boulder ne abstraction refinement and simulation to provide a more efficient approach to checking invariant properti...
Kuntal Nanshi, Fabio Somenzi
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
13 years 8 months ago
Managing verification error traces with bounded model debugging
Managing long verification error traces is one of the key challenges of automated debugging engines. Today, debuggers rely on the iterative logic array to model sequential behavior...
Sean Safarpour, Andreas G. Veneris, Farid N. Najm
DAC
2006
ACM
14 years 11 months ago
Transistor abstraction for the functional verification of FPGAs
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Guy Dupenloup, Thierry Lemeunier, Roland Mayr
DAC
2001
ACM
14 years 11 months ago
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines
roperty Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines Dong Wang , Pei-Hsin Ho , Jiang Long , James Kukula Yunshan Zhu , Tony Ma , Robert D...
Dong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukul...