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VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 5 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
13 years 9 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
VLSID
2004
IEEE
138views VLSI» more  VLSID 2004»
14 years 5 months ago
Synthesis-driven Exploration of Pipelined Embedded Processors
Recent advances on language based software toolkit generation enables performance driven exploration of embedded systems by exploiting the application behavior. There is a need fo...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
MTV
2003
IEEE
109views Hardware» more  MTV 2003»
13 years 9 months ago
A Methodology for Validation of Microprocessors using Equivalence Checking
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Nikil D. Dutt
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 8 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt