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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 5 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
FPL
2007
Springer
99views Hardware» more  FPL 2007»
13 years 9 months ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
GECCO
2009
Springer
156views Optimization» more  GECCO 2009»
13 years 11 months ago
Characterizing the genetic programming environment for fifth (GPE5) on a high performance computing cluster
Solving complex, real-world problems with genetic programming (GP) can require extensive computing resources. However, the highly parallel nature of GP facilitates using a large n...
Kenneth Holladay
EUROPAR
2000
Springer
13 years 8 months ago
Design and Evaluation of a Compiler-Directed Collective I/O Technique
Abstract. Current approaches to parallel I/O demand extensive user effort to obtain acceptable performance. This is in part due to difficulties in understanding the characteristics...
Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhar...
IPPS
2009
IEEE
13 years 11 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...