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DSD
2009
IEEE
88views Hardware» more  DSD 2009»
13 years 3 months ago
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana
ISPD
2004
ACM
92views Hardware» more  ISPD 2004»
13 years 11 months ago
A predictive distributed congestion metric and its application to technology mapping
Due to increasing design complexity, routing congestion has become a critical problem in VLSI designs. This paper introduces a distributed metric to predict routing congestion for...
Rupesh S. Shelar, Sachin S. Sapatnekar, Prashant S...
WWW
2005
ACM
14 years 6 months ago
Design for verification for asynchronously communicating Web services
We present a design for verification approach to developing reliable web services. We focus on composite web services which consist of asynchronously communicating peers. Our goal...
Aysu Betin-Can, Tevfik Bultan, Xiang Fu
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
13 years 11 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...