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DAC
1994
ACM
13 years 8 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
DATE
2004
IEEE
184views Hardware» more  DATE 2004»
13 years 8 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan
DATE
1998
IEEE
93views Hardware» more  DATE 1998»
13 years 9 months ago
Verification by Simulation Comparison using Interface Synthesis
One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the res...
Cordula Hansen, Arno Kunzmann, Wolfgang Rosenstiel
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
13 years 10 months ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...