16 search results - page 2 / 4 » Automatic discovery of mutual exclusion algorithms |
DAC
2005
ACM
14 years 6 months ago
2005
ACM
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
PPOPP
1997
ACM
13 years 9 months ago
1997
ACM
As shared-memory multiprocessors become the dominant commodity source of computation, parallelizing compilers must support mainstream computations that manipulate irregular, point...
FMSD
2000
13 years 5 months ago
2000
We review a number of formal verification techniques supported by STeP, the Stanford Temporal Prover, describing how the tool can be used to verify properties of several versions o...
ICDCS
2006
IEEE
13 years 11 months ago
2006
IEEE
Timing failures refer to a situation where the environment in which a system operates does not behave as expected regarding the timing assumptions, that is, the timing constraints...
CCGRID
2007
IEEE
13 years 12 months ago
2007
IEEE
Traditional parallel programming styles have many problems which hinder the development of parallel applications. The message passing style can be too complex for many programmers...