Sciweavers

10 search results - page 2 / 2
» Automatic heap sizing: taking real memory into account
Sort
View
IWSOC
2003
IEEE
137views Hardware» more  IWSOC 2003»
13 years 10 months ago
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design
CAD tools support is essential in the success of today digital system design methodologies. Unfortunately, most of the classical design tools do not take into account the possibil...
Philippe Brunet, Camel Tanougast, Yves Berviller, ...
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
13 years 9 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
ICCD
2006
IEEE
104views Hardware» more  ICCD 2006»
14 years 2 months ago
Guiding Architectural SRAM Models
— Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Mak...
Banit Agrawal, Timothy Sherwood
PDCN
2004
13 years 6 months ago
K-Means VQ algorithm using a low-cost parallel cluster computing
It is well-known that the time and memory necessary to create a codebook from large training databases have hindered the vector quantization based systems for real applications. T...
Paulo Sergio Lopes de Souza, Alceu de Souza Britto...
DATE
2002
IEEE
123views Hardware» more  DATE 2002»
13 years 10 months ago
False Path Elimination in Quasi-Static Scheduling
We have developed a technique to compute a Quasi Static Schedule of a concurrent specification for the software partition of an embedded system. Previous work did not take into a...
G. Arrigoni, L. Duchini, Claudio Passerone, Lucian...