7 search results - page 1 / 2 » Automating Production of Run-Time Reconfigurable Designs |
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
ERSA
2008
13 years 6 months ago
2008
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
FPL
2000
Springer
13 years 9 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
In this paper we present a novel adder/subtracter arithmetic unit that combines Binary and Binary Code Decimal (BCD) operations. The proposed unit uses effective addition/subtract...
DSN
2003
IEEE
13 years 10 months ago
2003
IEEE
The DepAuDE architecture provides middleware to integrate fault tolerance support into distributed embedded automation applications. It allows error recovery to be expressed in te...