31 search results - page 3 / 7 » Balanced Cache: Reducing Conflict Misses of Direct-Mapped Ca... |
IEEEPACT
2007
IEEE
14 years 2 days ago
2007
IEEE
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
EUROPAR
2010
Springer
13 years 6 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
CGO
2004
IEEE
13 years 9 months ago
2004
IEEE
Dynamic optimization systems store optimized or translated code in a software-managed code cache in order to maximize reuse of transformed code. Code caches store superblocks that...
CAL
2002
13 years 5 months ago
2002
Cache misses in small, limited-associativity primary caches very often replace live cache blocks, given the dominance of capacity and conflict misses. Towards motivating novel cach...
HPCC
2009
Springer
13 years 10 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...