12 search results - page 1 / 3 » Bandwidth Analysis of Functional Interconnects Used as Test ... |
ET
2010
13 years 2 days ago
2010
ETS
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper proposes a wrapper design for interconnects with guaranteed bandwidth and latency services and on-chip protocol. strate that these interconnects abstract the interconne...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...