317 search results - page 3 / 64 » Benchmarking weak memory models |
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory ac...
IPPS
2002
IEEE
13 years 10 months ago
2002
IEEE
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
EUROSYS
2007
ACM
14 years 2 months ago
2007
ACM
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
SC
2000
ACM
13 years 9 months ago
2000
ACM
We demonstrate that data reordering can substantially improve the performance of fine-grained irregular sharedmemory benchmarks, on both hardware and software shared-memory syste...
CONCUR
2009
Springer
13 years 9 months ago
2009
Springer
We consider the model of Time Petri Nets where time is associated with transitions. Two semantics for time elapsing can be considered: the strong one, for which all transitions are...