2 search results - page 1 / 1 » Bit-Level Analysis of an SRT Divider Circuit |
DAC
1996
ACM
13 years 8 months ago
1996
ACM
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
ARITH
1997
IEEE
13 years 8 months ago
1997
IEEE
SRT dividers are common in modern floating point units. Higher division performance is achieved by retiring more quotient bits in each cycle. Previous research has shown that rea...