48 search results - page 2 / 10 » Boolean satisfiability in electronic design automation |
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
DAC
2006
ACM
14 years 6 months ago
2006
ACM
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
DAC
2003
ACM
14 years 6 months ago
2003
ACM
Procedures for Boolean satis ability most commonly work with Conjunctive Normal Form. Powerful SAT techniques based on implications and con icts can be retained when the usual CNF...
TCAD
2010
12 years 11 months ago
2010
As contemporary VLSI designs grow in complexity, design debugging has rapidly established itself as one of the largest bottlenecks in the design cycle today. Automated debug soluti...