23 search results - page 1 / 5 » Bounding Worst-Case Instruction Cache Performance |
RTSS
1994
IEEE
13 years 9 months ago
1994
IEEE
The use of caches poses a difficult tradeoff for architects of real-time systems. While caches provide significant performance advantages, they have also been viewed as inherently...
RTAS
1996
IEEE
13 years 9 months ago
1996
IEEE
Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching, which is necessa...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
SIAMCOMP
2000
13 years 5 months ago
2000
ct Consider an arbitrary program P which is to be executed on a computer with two alternative cache memories. The rst cache has k sets and u blocks in each set, this is denoted a ...
RTAS
2008
IEEE
13 years 11 months ago
2008
IEEE
Real-time schedulability theory requires a priori knowledge of the worst-case execution time (WCET) of every task in the system. Fundamental to the calculation of WCET is a schedu...