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» CAD challenges for 3D ICs
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ASPDAC
2012
ACM
238views Hardware» more  ASPDAC 2012»
12 years 22 days ago
Design for manufacturability and reliability for TSV-based 3D ICs
—The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technolog...
David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Mo...
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 1 months ago
Whitespace redistribution for thermal via insertion in 3D stacked ICs
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
Eric Wong, Sung Kyu Lim
BMVC
2010
13 years 3 months ago
Back to the Future: Learning Shape Models from 3D CAD Data
Recognizing 3D objects from arbitrary view points is one of the most fundamental problems in computer vision. A major challenge lies in the transition between the 3D geometry of o...
Michael Stark, Michael Goesele, Bernt Schiele
DAC
2009
ACM
14 years 6 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
ICCAD
2004
IEEE
138views Hardware» more  ICCAD 2004»
14 years 1 months ago
A thermal-driven floorplanning algorithm for 3D ICs
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
Jason Cong, Jie Wei, Yan Zhang