Sciweavers

42 search results - page 1 / 9
» COSI: A Framework for the Design of Interconnection Networks
Sort
View
DT
2008
51views more  DT 2008»
13 years 5 months ago
COSI: A Framework for the Design of Interconnection Networks
Alessandro Pinto, Luca P. Carloni, Alberto L. Sang...
ANSS
2002
IEEE
13 years 10 months ago
Evaluating the Performance of Photonic Interconnection Networks
This paper describes the design and use of the Interconnection Network Simulator (ICNS) framework. ICNS is a modular, object-oriented simulation system that has been developed to ...
Roger D. Chamberlain, Ch'ng Shi Baw, Mark A. Frank...
CODES
2003
IEEE
13 years 10 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
SLIP
2009
ACM
13 years 11 months ago
Prediction of high-performance on-chip global interconnection
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin...
ISPASS
2009
IEEE
13 years 11 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...