37 search results - page 7 / 8 » Cache Replacement Policies for Multicore Processors |
IWMM
2009
Springer
13 years 11 months ago
2009
Springer
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
ICS
2003
Tsinghua U.
13 years 10 months ago
2003
Tsinghua U.
Cache behavior modeling is an important part of modern optimizing compilers. In this paper we present a method to estimate the number of cache misses, at compile time, using a mac...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
ASPLOS
2010
ACM
13 years 8 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...