8 search results - page 2 / 2 » Cache Sharing and Isolation Tradeoffs in Multicore Mixed-Cri... |
ASAP
2008
IEEE
14 years 3 days ago
2008
IEEE
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
IPPS
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
PDP
2011
IEEE
12 years 9 months ago
2011
IEEE
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...