15 search results - page 3 / 3 » Cache aware compression for processor debug support |
SIGMETRICS
1996
ACM
13 years 9 months ago
1996
ACM
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
MICRO
2008
IEEE
13 years 11 months ago
2008
IEEE
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
FPGA
2005
ACM
13 years 10 months ago
2005
ACM
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
HPCA
1998
IEEE
13 years 9 months ago
1998
IEEE
Scalable shared-memory multiprocessors that are designed as Cache-Only Memory Architectures Coma allow automatic replication and migration of data in the main memory. This enhance...