17 search results - page 1 / 4 » Challenges in Automatic Optimization of Arithmetic Circuits |
ARITH
2009
IEEE
14 years 4 days ago
2009
IEEE
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
CASES
2009
ACM
13 years 9 months ago
2009
ACM
2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
SASP
2009
IEEE
14 years 1 days ago
2009
IEEE
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...
FCCM
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...