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» Challenges in Business Process Analysis
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TC
2011
13 years 13 days ago
Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
TOG
2012
208views Communications» more  TOG 2012»
11 years 8 months ago
Video-based 3D motion capture through biped control
Marker-less motion capture is a challenging problem, particularly when only monocular video is available. We estimate human motion from monocular video by recovering three-dimensi...
Marek Vondrak, Leonid Sigal, Jessica K. Hodgins, O...
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 5 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...