280 search results - page 2 / 56 » Challenges in exploitation of loop parallelism in embedded a... |
CF
2009
ACM
14 years 23 hour ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
DATE
2007
IEEE
13 years 12 months ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
PLDI
2000
ACM
13 years 10 months ago
2000
ACM
Increasing focus on multimedia applications has prompted the addition of multimedia extensions to most existing general purpose microprocessors. This added functionality comes pri...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
EUROPAR
2000
Springer
13 years 9 months ago
2000
Springer
This paper investigates the potential for automatic mapping of typical embedded applications to architectures with multimedia instruction set extensions. For this purpose a (patter...