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» Characterization of essential dynamic instructions
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MICRO
1994
IEEE
118views Hardware» more  MICRO 1994»
13 years 9 months ago
Characterizing the impact of predicated execution on branch prediction
Branch instructions are recognized as a major impediment to exploiting instruction level parallelism. Even with sophisticated branch prediction techniques, many frequently execute...
Scott A. Mahlke, Richard E. Hank, Roger A. Bringma...
HPCA
1995
IEEE
13 years 8 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...
IISWC
2006
IEEE
13 years 11 months ago
Workload Characterization of 3D Games
—The rapid pace of change in 3D game technology makes workload characterization necessary for every game generation. Comparing to CPU characterization, far less quantitative info...
Jordi Roca, Victor Moya Del Barrio, Carlos Gonz&aa...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 7 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
HIPC
2000
Springer
13 years 8 months ago
Instruction Level Distributed Processing
Within two or three technology generations, processor architects will face a number of major challenges. Wire delays will become critical, and power considerations will temper the ...
James E. Smith