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HPCA
2005
IEEE
14 years 5 months ago
Checkpointed Early Load Retirement
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...
Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, Jos...
MICRO
2002
IEEE
103views Hardware» more  MICRO 2002»
13 years 9 months ago
Cherry: checkpointed early resource recycling in out-of-order microprocessors
This paper presents CHeckpointed Early Resource RecYcling (Cherry), a hybrid mode of execution based on ROB and checkpointing that decouples resource recycling and instruction ret...
José F. Martínez, Jose Renau, Michae...