As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
Restricting the search space {0, 1}n to the set of truth tables of “easy” Boolean functions on log n variables, as well as using some known hardness-randomness tradeoffs, we ...
Russell Impagliazzo, Valentine Kabanets, Avi Wigde...
We establish the first polynomial-strength time-space lower bounds for problems in the lineartime hierarchy on randomized machines with two-sided error. We show that for any inte...
We consider the problem of uniform sampling of points on an algebraic variety. Specifically, we develop a randomized algorithm that, given a small set of multivariate polynomials ...