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» Circuit techniques for low-power CMOS GSI
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ISLPED
1999
ACM
177views Hardware» more  ISLPED 1999»
13 years 9 months ago
Low power synthesis of dual threshold voltage CMOS VLSI circuits
The use of dual threshold voltages can significantly reduce the static power dissipated in CMOS VLSI circuits. With the supply voltage at 1V and threshold voltage as low as 0.2V ...
Vijay Sundararajan, Keshab K. Parhi
ISCAS
2007
IEEE
142views Hardware» more  ISCAS 2007»
13 years 11 months ago
A Low Power Domino with Differential-Controlled-Keeper
— Domino circuits are used to achieve higher system performance than static CMOS techniques. This work briefly surveys domino keeper designs for high fan-in domino circuits. A ne...
Peiyi Zhao, Jason McNeely, Magdy A. Bayoumi, Golco...
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ISLPED
2005
ACM
72views Hardware» more  ISLPED 2005»
13 years 10 months ago
A low power current steering digital to analog converter in 0.18 Micron CMOS
This paper discusses a number of circuit techniques which address the DC and AC distortion performance of a low power current steering Digital-to-Analog Converter design. The desi...
Douglas Mercer
ICCAD
1996
IEEE
131views Hardware» more  ICCAD 1996»
13 years 9 months ago
Multi-level logic optimization for low power using local logic transformations
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
Qi Wang, Sarma B. K. Vrudhula
IJON
2007
118views more  IJON 2007»
13 years 5 months ago
Low power CMOS electronic central pattern generator design for a biomimetic underwater robot
— This paper, presents a feasability study of a central pattern generator-based analog controller for an autonomous robot. The operation of a neuronal circuit formed of electroni...
Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin ...