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» Clocktree RLC Extraction with Efficient Inductance Modeling
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DATE
2000
IEEE
71views Hardware» more  DATE 2000»
13 years 9 months ago
Clocktree RLC Extraction with Efficient Inductance Modeling
In this paper, we present an efficient yet accurate inductance extraction methodology and also apply it to clocktree RLC extraction. We first show that without loss of accuracy, t...
Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie...
DATE
2002
IEEE
95views Hardware» more  DATE 2002»
13 years 9 months ago
Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses
Due to the increasing operating frequencies and the manner in which the corresponding integrated circuits and systems must be designed, the extraction, modeling and simulation of ...
Hui Zheng, Lawrence T. Pileggi, Michael W. Beattie...
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
13 years 9 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
TCAD
2002
137views more  TCAD 2002»
13 years 4 months ago
Generalized traveling-wave-based waveform approximation technique for the efficient signal integrity verification of multicouple
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...
Yungseon Eo, Seongkyun Shin, William R. Eisenstadt...
DAC
2003
ACM
14 years 5 months ago
Efficient model order reduction including skin effect
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
Shizhong Mei, Chirayu S. Amin, Yehea I. Ismail