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» Closing a Million-Landmarks Loop
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CODES
2005
IEEE
13 years 10 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
IPPS
2003
IEEE
13 years 10 months ago
A Compilation Framework for Distributed Memory Parallelization of Data Mining Algorithms
With the availability of large datasets in a variety of scientific and commercial domains, data mining has emerged as an important area within the last decade. Data mining techni...
Xiaogang Li, Ruoming Jin, Gagan Agrawal
EMSOFT
2001
Springer
13 years 9 months ago
Some Synchronization Issues When Designing Embedded Systems from Components
Abstract This paper is sort of a confession. Issues of synchrony, asynchrony, and synchronization, arise frequently in designing embedded systems from components, like everyone I k...
Albert Benveniste
ANSS
2000
IEEE
13 years 9 months ago
Multi-Resolution Modeling of Power Converter Using Waveform Reconstruction
Computer simulation of switching power converters is complicated by the discontinuous (switching) nature of the converter waveforms. When switching details of the waveforms are of...
Yuwei Luo, Roger Dougal, Enrico Santi
ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
13 years 9 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...