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ICCD
2011
IEEE
296views Hardware» more  ICCD 2011»
12 years 5 months ago
DPPC: Dynamic power partitioning and capping in chip multiprocessors
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
Kai Ma, Xiaorui Wang, Yefu Wang
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
13 years 11 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
DCC
2007
IEEE
14 years 5 months ago
Transmission Over Slowly Fading Channels Using Unreliable Quantized Feedback
We study the problem of maximizing the expected rate over a slowly fading channel with quantized channel state information at the transmitter (CSIT). This problem has been recentl...
Siavash Ekbatani, Farzad Etemadi, Hamid Jafarkhani
INFOCOM
2010
IEEE
13 years 3 months ago
Distributed Power Control for Cognitive User Access based on Primary Link Control Feedback
—We venture beyond the “listen-before-talk” strategy that is common in many traditional cognitive radio access schemes. We exploit the bi-directional nature of most primary c...
Senhua Huang, Xin Liu, Zhi Ding
GLOBECOM
2009
IEEE
13 years 9 months ago
Optimum Allocation of Energy and Spectrum in Power-Controlled Wireless Networks with QoS Constraints
An important performance measure in wireless networks is the manner in which the network can distributively manage its limited energy and spectrum resources, while assuring certain...
Stepán Kucera, Ludek Kucera, Bing Zhang